sequential logic circuit

A Standard Method to Find internal Clock Pulse Overlay Area by Karnaugh Map ── Analysis of Asynchronous Sequential Logic Circuit in the Case or Comples Clock Pulse

利用卡诺图寻找内时钟复盖区的规范方法&复杂时钟下异步时序罗辑电路分析

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A threshold memory circuit for realizing arbitrary multivalued sequential logic

一种用于实现任意基数值时序逻辑的阈值存储电路

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The multiple fault testing of synchronous sequential circuit with the dynamic Boolean equation method which reduces the Exclusive-OR operation to the logic addition one is proposed.

本文提出了同步时序线路多故障测试动态布尔方程方法，它将同步时序线路中的异或运算归结为逻辑加运算，可一次求出被测线上双固定型故障s-a-1和s-a-0的全部测试集。

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Firstly, the Ternary Logic Difference is introduced, then a complex model of arbitrary networks is set up on the basis of new ternary algebra, and finally, a new algorithm is presented, by which one can describe the transient process of a sequential circuit completely.

在新三值代数的基础上建立了任意网络的复数模型。最后，本文提出一个新算法，用此算法能完整地描述时序电路的过渡过程。

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Flip-flops are a key component and memory cells of sequential logic circuit.

触发器是构成时序逻辑电路的存储单元和核心部件.

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A full custom Multiple-function and Multiple-Valued Array Integrated Circuit ( MMAIC) is presented in this paper, which is able to realize binary, ternary combinational logic, sequential logic and multiplexed digital and analog switching function etc.

本文提出了一种可实现二值、三值组合逻辑、时序逻辑和多路数字模拟开关等功能的全定制多功能多值逻辑阵列集成电路（简称MMAIC）。

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